A. Field of the Invention
The present invention relates to semiconductor devices and the method of manufacturing the semiconductor devices. Specifically, the invention relates to power semiconductor devices such as a diode, an insulated gate field effect transistor having a metal-insulator-semiconductor structure (hereinafter referred to as a “MISFET”), and an insulated gate bipolar transistor (hereinafter referred to as an “IGBT”) which include a specific edge terminating structure disposed therein.
B. Description of the Related Art
Generally, many pieces of a semiconductor device such as a diode, a MISFET, and an IGBT are formed in a semiconductor wafer. Many power semiconductor devices employ a planar-type junction edge terminating structure. Since the section that has the planar-type junction edge terminating structure includes a portion, in which equipotential surfaces curve sharply, electric field localization is caused more easily in the section having the planar-type junction edge terminating structure than on the flat junction in the active section of the semiconductor devices. (Hereinafter, the section having an edge terminating structure will be referred to as the “edge terminating section.”)
Once a high-electric-field portion is caused in the edge terminating section, the electric field strength reaches the critical value, which causes breakdown, faster in the edge terminating section than in the active section. Therefore, breakdown is caused at a voltage lower than the designed breakdown voltage. To obviate this problem, a floating guard ring structure, a field plate structure, a reduced-surface-electric-field structure (hereinafter referred to as a “RESURF structure”), and appropriate combinations of these structures are employed for the planar-type junction edge terminating structure to secure the designed breakdown voltage (cf. Publication of Unexamined Japanese Patent Application Hei. 2 (1990)-22869 (Counterpart U.S. Pat. No. 4,904,609, Counterpart U.S. Pat. No. 4,999,684) and Publication of Unexamined Japanese Patent Application 2001-85727).
Super-junction semiconductor devices, which include an alternating conductivity type layer including p-type partition regions and n-type drift regions arranged alternately (hereinafter referred to as a “super-junction layer) and extended into the edge terminating section, have been known to the ordinary skilled person in the art (cf. Publication of Unexamined Japanese Patent Application 2004-319732 (Counterpart U.S. Pat. No. 6,849,900) and Publication of Unexamined Japanese Patent Application 2003-115589). In the semiconductor devices described in these two documents, the super-junction layer in the edge terminating section has a structure that facilitates keeping charge valance between the p-type partition regions and the n-type drift regions. Alternatively, the edge terminating section includes an additional semiconductor layer, the conductivity type thereof is the same with the conductivity type of the drift layer, and any of a floating guard ring structure, a field plate structure, and a RESURF structure formed on the additional semiconductor layer.
A super-junction semiconductor device, which includes an insulator region around the active section including a super-junction layer and sustains the breakdown voltage with the insulator region, has been known to the ordinary skilled person in the art (cf. Publication of Unexamined Japanese Patent Application 2001-244461).
The super-junction semiconductor device is a semiconductor device in which the drift layer is neither uniform nor of one conductivity type but comprised instead of semiconductor regions of a first conductivity type (e.g., n-type drift regions) and semiconductor regions of a second conductivity type (e.g., p-type partition regions) laminated alternately.
However, in many semiconductor devices, the conventional planar-type junction edge terminating structure is formed around the active section and the surface of the edge terminating structure is coplanar with the surface of the active section including a main junction that sustains the breakdown voltage. In this case, an electric field strength rise is caused by the flat pn-junction and a high-electric-field portion is caused by the electric field localization due to the existence of a portion which has a curvature on the junction plane in the edge terminating section. Due to the multiplier effect of the electric field strength rise and the resulting high-electric-field portion, the electric field strength reaches the critical value that causes breakdown faster in the edge terminating section than in the active section, causing a low breakdown voltage. Here, the main junction that sustains the breakdown voltage is a pn-junction, to which a voltage is applied in the reverse direction.
In view of the foregoing, it would be desirable to obviate the problems described above. It would be also desirable to provide a semiconductor device that improves the breakdown voltage of the junction edge terminating structure. It would be further desirable to provide a method of manufacturing the semiconductor device that improves the breakdown voltage of the junction edge terminating structure.
The present invention is directed to overcoming or at least reducing the effects of one or more of the problems set forth above.